StarFive Dubhe/U/S/E Series RISC-V Cores

StarFive has multiple commercial core offerings. You can read about them here.

 

StarFive E Series Cores

The E2 series is highly optimized for area and power consumption, delivering best-in-class performance. For microcontrollers and embedded devices, the E2 core can be configured as small as 13.5k gates through an efficient 2-stage pipeline, or through a 3-stage pipeline, hardware floating point, instruction cache, etc. to achieve higher performance.

• Configurable Core Performance
• Floating point unit supporting double, single and half precision
• Custom memory maps and ports
• Optional Tightly Integrated Memory (TIM)
• Support RV32E instruction set, support the smallest core configuration, as small as 13.5kgates, the die size of 28nm process is 0.005 mm2
• Bit manipulation extension

 

The E3 series are highly integrated and feature-rich processors. The E3 family includes the E31 core, the most widely deployed RISC V core in the world. The E3 embedded core has a 5-6 stage pipeline, achieving a good balance between performance and energy efficiency.

• Supports coherency of up to 8 E3 cores, optional L2 cache controller
• Optional single-precision or double-precision floating-point unit
• Level 1 Memory System (Level 1 Memory System) and ECC function
• Number, type, width of bus interfaces
• Support SiFive Insight Advanced Trace and Debug

 

The E7 series provides 32-bit embedded processors, mainly for applications requiring high performance and high energy efficiency ratio. The E7 core has a sequential superscalar issue 8-stage pipeline.

• Kernels that support RV32GCV
  Dual-issue, sequential 8-stage Harvard architecture pipeline
  performance and area
• DMIPS – 2.5 DMIPS/MHz
  Coremark – 5.1 CoreMarks/MHz
  Only 30% larger core area than similarly configured 3-series cores
  Very flexible storage system configuration
• Optional I$ and D$
  Optional I and D TCM interface
  Optional Fast IO (FIO) for low-latency, high-bandwidth, memory-mapped IO
  Functional safety and real-time
• In level 1 and level 2 cache, both support single error correction and double error detection code ECC function
  Programmatically clear and/or disable dynamic branch prediction for deterministic execution and enhanced safety
  Support multi-core function, configurable L2 that supports memory consistency

 

StarFive S Series Cores

The S2 series is a 64-bit microcontroller that is highly optimized for area and performance and can be easily integrated into a 64-bit SoC. The S2 core, like the E2 series, has an efficient 2-3 stage pipeline, and a core local interrupt controller (CLIC), which can achieve fast interrupt response. The S2 Series can be fully customized to meet your specific needs.

 

The S5 series offers 64-bit RISC-V performance with 32-bit power and area. The S5 core has a 5-6 stage pipeline, achieving a good balance between performance and energy efficiency.

• Support coherency of up to 8 S5 series cores, optional L2 cache controller
• Configurable Core Performance
• Double Precision Floating Point Unit
• Level 1 Memory System (Level 1 Memory System) and ECC function
• Up to 47 bits of physical addressing
• Number, type and width of bus interfaces

 

StarFive U Series Cores

The U5 series is an AP processor based on the RISC-V architecture and supports running the Linux operating system, which can provide high performance and high energy efficiency. The U5 core has a 5-6 stage pipeline and supports virtual memory, enabling 64-bit RISC-V applications.

• Supports up to 9 cores and optional L2 cache controller
• Heterogeneous multicore with configurable number of U5 and S5 cores and pre-integrated
• Performance of U5 and S5 cores
• L1 and L2 two-level cache system and optional ECC protection
• Configurable number, type and width of bus interfaces

 

The U7 series has the highest performance application processor based on RISC-V and supports Linux operating system. The U7 core has a superscalar 8-stage pipeline and supports virtual memory. Support for the most demanding 64-bit RISC-V applications such as Edge Compute, Big Data Analytics and 5G Base Stations.

 

StarFive Dubhe Series Cores

StarFive Dubhe is the first commercial RISC-V CPU IP to support a rich set of RISC-V extensions, including latest B (bit-manipulation), V (vector) and H (hypervisor) extensions, enabling more edge cloud and high-performance computing applications running on RISC-V.
Dubhe is a superior high-performance 12-stage pipeline out-of-order RISC-V CPU core which supports standard RISC-V RV64GCBVHN extensions and targets for applications which require high-performance computation capability. It is highly scalable, optimized for highest performance and frequency design, bringing the total 31 SPECint2k6 supreme performance. Dubhe is pre-integrated and verified into the core complex to ease SoC development efforts and provides options of single core, dual-core, or quad-core in a single cluster with memory coherency.

• Superior Performance
• Frequence：2GHz@TSMC 12nm
  SPECint2006：Target 9.0/GHz
  Industry-leading Power and Area Efficiency (TSMC 12nm)
• Low Power
  High Area Efficiency
  Efficient Design to RISC-V Vector Extension
• Data types: floating point, fixed point, and integer
  VLEN=128-1024bits
  ALU & data path width=128 or 256 bits
  Full vector register grouping (LMUL) support
  RISC-V Virtualization Extension
• The first commercial RISC-V CPU IP support virtualization
  Pre-integrated Multi-Core with Memory Coherency Support
• The first commercial RISC-V CPU IP support virtualization

 

You can order Star Five Cores here