Steel is a RISC-V processor core that implements the RV32I and Zicsr instruction sets of the RISC-V specifications. It is designed to be simple and easy to use.

Features

  • Simple, easy to use
  • Free, open-source
  • RV32I base instruction set + Zicsr extension + M-mode privileged architecture
  • 3 pipeline stages, single-issue
  • Hardware described in Verilog
  • Full documentation
  • RISC-V compliant
  • 1.36 CoreMarks/MHz

 

You can download Steel Core here