RISC-V IP Cores
Here is a list of RISC-V IP cores with implementation tools ranging from Verilog, VHDL to Chisel and SpinalHDL. Some of these are purely for learning purposes while the rest have strong corporate and academia backing and are meant for production and tapeout.
T-HEAD XuanTie C910 RISC-V
Overview C910 is a RISC-V compatible 64-bit high performance processor developed by T-Head [...]
T-HEAD XuanTie C906 RISC-V
Overview The C906 processor is based on the RV64GCV instruction set and includes [...]
T-HEAD XuanTie E907 RISC-V
Overview The T-Head XuanTie E907 is a fully synthesizable, high-end, microcontroller-class processor that [...]
T-HEAD XuanTie E906 RISC-V
Overview The T-Head XuanTie E906 is a fully synthesizable, middle-end, microcontroller-class processor that [...]
T-HEAD XuanTie E902 RISC-V
The T-Head XuanTie E902 is a fully synthesizable, microcontroller-class processor that is compatible [...]
TinyRISCV A very simple implementation by Liang Kangnan
This project implements a single-core 32-bit small RISC-V processor core (tinyriscv), written in [...]
SSRV Superscalar out-of-order RV32IMC core
SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, performance: 6.4 CoreMark/MHz. Feature [...]
Shakti open source processor development ecosystem
The SHAKTI Processor Program, was started as an academic initiative back in 2014 [...]
Syntacore SCR7 high-performance 64bit application core
The Syntacore SCR7 is a 64bit Linux-capable application core with virtual memory, MMU, [...]
Syntacore SCR5 efficient application core (RV32 or RV64)
Syntacore SCR5 is an efficient 32- or 64bit Linux-capable application core with virtual [...]
Syntacore SCR6 high performance embedded MCU
The SCR6 is a high-performance multicore embedded MCU with rich memory features. [...]
Syntacore SCR4 Microcontroller as RV32 or RV64 with FPU
The SCR4 is a high-performance 32 or 64bit multicore capable MCU core with [...]
Syntacore SCR3 Microcontroller as RV32 or RV64
The SCR3 is a high-performance 32 or 64bit multicore capable MCU-class core with [...]
IQonIC RISC-V IP
IQonIC Works RISC-V Cores come with a full suite of design IP including: [...]
RiscyOO: RISC-V 64bit Out-of-Order Processor
This post contains the RiscyOO processor written in Bluespec System Verilog (BSV). RiscyOO [...]
Rift2Core RISC-V with RV64GC in Chisel3
Based on Chisel3, Rift2Core is a 9-stage, N-issue(Configurable), out-of-order, 64-bits RISC-V Core, which [...]
ReonV 32bit VHDL synthesizable RISC-V core
ReonV is a modified version of the Leon3, a synthesizable VHDL model of a [...]
Efabless ASIC implementation of the PicoSoC PicoRV32
Raven is using a very popular 32-bit RISC-V core (PicoRV32) developed by Clifford [...]
ParaNut Highly Parallel RISC-V Processor
ParaNut processor is a customizable, highly scalable, and RISC-V compatible processor architecture for [...]
Nuclei RISC-V 200 Series Processors
N200 Series is designed for deeply embedded application with low power and area [...]
Nuclei RISC-V 300 Series Processors
The Nuclei N300 series 32-bit risc-v processor is designed for scenarios with extreme [...]
Nuclei RISC-V 600 Series Processors
The Nuclei 600 series processors include three products: N600 (32-bit), nx600 (64 bit) [...]
Nuclei RISC-V 900 Series Processors
The Nuclei 900 series processors include three products: N900 (32-bit), nx900 (64 bit) [...]
NSI-TEXE NS31A: 32bit CPU complies ISO26262 ASIL D
The NS31A is a general-purpose CPU with a single-issue, in-order 4-stage pipeline that [...]
mmRISC-1 RV32IMAFC MCU Core with Questa Sim Support
mmRISC_1 is a RISC-V compliant CPU core with RV32IMAFC extensions supported ISA for [...]
Microsemi MIV_RV32IMAF_L1_AHB Softcore
The MIV_RV32IMAF_L1_AHB is a softcore processor designed to implement the RISC-V instruction set [...]
NOEL-V Processor for harsh environments
The NOEL-V is a synthesizable VHDL model of a processor that implements the [...]
Klessydra fT13 Fault Tolerant RISC-V Processor
The Klessydra processing core family is a set of processors that are fully [...]
Fedar F1 RV64IM RISC-V
Fedar F1 is a 5-Stage Pipelined (Fetch|Decode|Execute|Memory|Writeback) RV64IM RISC-V Core written fully in [...]
HARV – Radiation Hardened RISC-V IP Core
The focus of the HARV processor core is harsh environments. It implements the [...]
Greenwaves-technologies GAP8 IoT application processor
Introduction of the GAP8 IoT application processor GAP8 is a RISC-V and PULP [...]
Fraunhofer Institute EMSA5 RISC-V IP
The Fraunhofer IPMS offers a processor IP Core based on the RISC-V architecture. This [...]
SiFive Essential Family
The SiFive Essential family is a portfolio of processor cores that spans from [...]
SiFive Automotive Series
The transition to digital is impacting every aspect of the vehicle, from the [...]
SiFive Intelligence Family
The SiFive Intelligence Family leverages a software-first approach to processor design to address [...]
SiFive Performance Family
SiFive Performance processors deliver unparalleled performance in an energy-efficient small footprint The SiFive [...]
Semidynamics Avispado Small Area and Power RISC-V IP Core
The Avispado core, with its small area and power is ideal for energy-conscious [...]
Semidynamics Atrevido High Bandwidth RISC-V IP Core
Ready for the most demanding workloads, Atrevido supports large memory capacities with its [...]
OpenHW Group CORE-V MCU
CORE-V MCU originated from PULPissimo and is now a stand-alone project within OpenHW [...]
MINRES Good Folk Series ISO 26262 Compliant RISC-V
The Good Folk Series from MINRES is a growing family of Trustworthy, Generator-Based [...]
StarFive Dubhe/U/S/E Series RISC-V Cores
StarFive has multiple commercial core offerings. You can read about them here. [...]
Minimax: a Compressed-First, Microcoded RISC-V CPU
RISC-V's compressed instruction (RVC) extension is intended as an add-on to the regular, [...]
Clarvi a RISC-V processor
Clarvi or "Computer LAboratory RISC-V Implementation" is a simple, in-order, 6-stage pipeline implementation [...]
OpenPiton Open Source Research Processor
OpenPiton is a general purpose, multithreaded manycore processor. It is a tiled manycore [...]
PULPino single-core microcontroller system
PULPino is an open-source single-core microcontroller system, based on 32-bit RISC-V cores developed [...]
NutShell Processor by OSCPU
NutShell is a processor developed by the OSCPU (Open Source Chip Project by [...]
YARVI2 FPGA-focused RISC-V Softcore
YARVI2 is an FPGA-focused in-order scalar RISC-V softcore with branch prediction. The original, [...]
Klessydra-T13 Multithreaded RISC-V
The Klessydra processing core family is a set of processors featuring full compliance [...]
Steel core implementation of RV32I and Zicsr
Steel is a RISC-V processor core that implements the RV32I and Zicsr instruction [...]
WARP-V The open-source RISC-V core IP
WARP-V is an open-source CPU core generator written in TL-Verilog with support for [...]
RSD RISC-V Out-of-Order Superscalar Processor
RSD is a 32-bit RISC-V out-of-order superscalar processor core. RSD is very fast [...]
RPU RISC-V in VHDL
This is a RV32IMZcsr ISA CPU implementation, based off of a TPU CPU [...]
DarkRISCV Opensource RISC-V from scratch
The main motivation for the DarkRISCV was create a migration path for some [...]
biRISC-V 32-bit Linux Capable CPU
BIRISC is a 32-bit dual issue RISC-V CPU that can boot linux and [...]
Hummingbirdv2 E203 Core and SoC
This repository hosts the project for open-source Hummingbirdv2 E203 RISC-V processor Core and [...]
Syntacore SCR1 Microcontroller RISC-V Core
SCR1 is an open-source and free to use RISC-V compatible MCU-class core, designed [...]
RV12 RISC-V Core
The RV12 is a highly configurable single-issue, single-core RV32I, RV64I compliant RISC CPU [...]
The Lizard Core
The Lizard Core is a synthesizable RISC-V RV64IM out-of-order processor, designed in PyMTL. [...]
Berkeley Out-of-Order RISC-V Processor
The Berkeley Out-of-Order Machine (BOOM) is a synthesizable and parameterizable open source RV64GC [...]
NEORV32 RISC-V Processor
The NEORV32 Processor is a customizable microcontroller-like system on chip (SoC) built around the NEORV32 RISC-V CPU. [...]
Western Digital SweRV Core Series
Western Digital has developed four RISC-V cores, the 64 bit, multicore SweRV Core [...]
SERV bit-serial RISC-V CPU
SERV is an award-winning bit-serial RISC-V core. Here is an introduction to SERV, [...]
Rocket Chip RISC-V Core
Rocket Chip is an open-source Sysem-on-Chip design generator that emits synthesizable RTL. It [...]
RISCV-MINI a simple RISC-V in Chisel
Developed by Donggyu Kim, riscv-mini is a simple RISC-V 3-stage pipeline written in [...]
PicoRV32 Size-Optimized RISC-V CPU
PicoRV32 is a CPU core that implements the RISC-V RV32IMC Instruction Set. It can [...]
Minerva RISC-V Soft Processor
Minerva is a CPU core that currently implements the RISC-V RV32IM instruction set. Its [...]
Ibex RISC-V Core
Ibex is a production-quality open source 32-bit RISC-V CPU core written in SystemVerilog. [...]
OpenHW Group CORE-V CV32E40P
CV32E40P is a small and efficient, 32-bit, in-order RISC-V core with a 4-stage [...]
CVA6 RISC-V CPU
CVA6 is a 6-stage, single issue, in-order CPU which implements the 64-bit RISC-V [...]
Bluespec Flute
Flute is one of a family of free and open-source RISC-V CPUs from [...]
NaxRiscv SpinalHDL RISC-V Core
NaxRiscv was designed using SpinalHDL (a Scala hardware description library). One goal of [...]
VexRiscv SpinalHDL Core
This repository hosts a RISC-V implementation written in SpinalHDL with MMU and Linux [...]
Bluespec Piccolo
Piccolo is intended for low-end applications (Embedded Systems, IoT, microcontrollers, etc.). This is [...]
Intel Nios V RISC-V Processors
Nios V processor is the next generation of soft processor for Intel FPGAs [...]
Vortex RISC-V GPGPU
Vortex is a full-system RISCV-based GPGPU processor with OpenCL 1.2 support. Specifications [...]
BlackParrot RV64GC RISC-V Multicore
BlackParrot aims to be the default open-source, Linux-capable, cache-coherent, RV64GC multicore used by [...]
Lion RISC-V on VELDT FPGA Board
Lion is a formally verified, 5-stage pipeline RISC-V core. Lion targets the VELDT FPGA development board and [...]
RSD RISC-V Out-of-Order Superscalar Core
Developed by Ryota Shioya, RSD is a 32-bit RISC-V out-of-order superscalar processor core. [...]
biRISC-V – 32-bit dual issue RISC-V
biRISC-V is a 32-bit Superscalar RISC-V CPU with the following features: Features [...]
UltraEmbedded RISC-V Core
UltraEmbedded presents a 32-bit RISC-V core written in Verilog and an instruction set [...]
XiangShan
XiangShan is an open-source high-performance RISC-V core developed by the Institute of Computing [...]
VeriGPU is a RISC-V based Open Source GPU
The goal of VeriGPU is to Build an opensource GPU, targeting not only [...]
VRoom RISC-V IP
VRoom is a very high end RISC-V implementation meant for cloud servers and [...]